Product Summary

The CAT28C64BPI-12 is a fast, low power, 5V-only CMOS Parallel E2PROM organized as 8K x 8-bits. It requires a simple interface for in-system programming. On-chip address and data latches, self-timed write cycle with auto-clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bits signal the start and end of the self-timed write cycle. Additionally, the CAT28C64BPI-12 features hardware and software write protection. The CAT28C64BPI-12 is manufactured using Catalyst advanced CMOS floating gate technology. It is designed to endure 100,000 program/erase cycles and has a data retention of 100 years. The CAT28C64BPI-12 is available in JEDECapproved 28-pin DIP, 28-pin TSOP, 28-pin SOIC, or, 32-pin PLCC package.

Parametrics

CAT28C64BPI-12 absolute maximum ratings: (1)Temperature Under Bias: –55℃ to +125℃; (2)Storage Temperature: –65℃ to +150℃; (3)Voltage on Any Pin with Respect to Ground: –2.0V to +VCC + 2.0V; (4)VCC with Respect to Ground: –2.0V to +7.0V; (5)Package Power Dissipation Capability (Ta = 25℃): 1.0W; (6)Lead Soldering Temperature (10 secs): 300℃; (7)Output Short Circuit Current(3): 100 mA.

Features

CAT28C64BPI-12 features: (1)Fast Read Access Times: – 120/150ns; (2)Low Power CMOS Dissipation: – Active: 25 mA Max; – Standby: 100 μA Max.; (3)Simple Write Operation: – On-Chip Address and Data Latches; Self-Timed Write Cycle with Auto-Clear; (4)Fast Write Cycle Time: – 5ms Max.; (5)CMOS and TTL Compatible I/O; (6)Hardware and Software Write Protection; (7)Commercial, Industrial and Automotive Temperature Ranges; (8)Automatic Page Write Operation: – 1 to 32 Bytes in 5ms; Page Load Timer; (9)End of Write Detection: Toggle Bit; DATA Polling; (10)100,000 Program/Erase Cycles; (11)100 Year Data Retention.

Diagrams

CAT28C64BPI-12 block diagram

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